1. Field of the Invention
The present invention relates to digital memory circuits and, more specifically, to a a sense amplifier SRAM that mitigates the hysteresis effect.
2. Description of the Prior Art
Most digital computers use some sort of memory circuit to store data values during processing. Static random access memory (SRAM) is a semiconductor memory, used in digital computers and similar applications, that does not require periodic refreshing in order to maintain a data value over time. A typical array of SRAM circuits includes an array of bi-stable latching circuits to store data values.
One type of SRAM employs a sense amplifier SRAM, which is a memory device that uses cross-coupled devices to detect differential signals. This type of SRAM includes a memory cell that generates both a true data value being stored and a compliment of the true data value. In silicon on insulator (SOI) technologies, sense amplifier SRAMs exhibit a hysteresis effect (also referred to as “history effect”), in which on each read of a “one” or a “zero” the voltage of the bodies of the cross coupled devices will drift slightly apart. If one value (e.g., a “1”) is read repeatedly over a long period of time, then the bodies of the cross-coupled devices can drift apart by 10% or more, thereby increasing the bitline signal margin needed to sense the correct state. In certain scenarios, the hysteresis effect can result in read failures.
One existing solution to this problem is the use of body-contacted devices which would hold the bodies of the cross-coupled devices to a known value. However, this solution has an impact on chip area and is prone to process variations.
Therefore, there is a need for a method and circuit that mitigates the hysteresis effect without the use of body contacted devices.